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ML accelerator on a RISC-V FPGA SoC – zero-cycle matmul, boots Linux

ML accelerator on a RISC-V FPGA SoC – zero-cycle matmul, boots Linux

Mylene Farrell by Mylene Farrell
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Mar 20, 2026 Developer Tools

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ML accelerator on a RISC-V FPGA SoC – zero-cycle matmul, boots Linux

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The ML accelerator is built on a RISC-V FPGA SoC, featuring a zero-cycle matrix multiplication unit for accelerated machine learning computations. It supports booting Linux, allowing for a wide range of applications and development environments. This custom-designed system enables developers to create and test machine learning models with improved performance and efficiency.

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